CG635
16 digits of frequency resolution 80 ps rise and fall times CMOS, PECL, ECL, LVDS & RS-485 Phase control and time modulation PRBS for eye-pattern testing
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16 digits of frequency resolution 80 ps rise and fall times CMOS, PECL, ECL, LVDS & RS-485 Phase control and time modulation PRBS for eye-pattern testing OCXO and rubidium timebase Clocks from 1 µHz to 2.05 GHz Random jitter less than 1 ps rms CMOS, PECL, ECL, LVDS, & RS485 CMOS, PECL, ECL, LVDS & RS485 CG635 Clock Generator The CG635 generates extremely stable square wave clocks between 1 µHz and 2.05 GHz. The instrument's high frequency resolution, low jitter, fast transition times, and flexible output levels make it ideal for use in the development and testing of virtually any digital component, system or network. Clean clocks are critical in systems that use high-speed ADCs or DACs. Spurious clock modulation and jitter create artifacts and noise in acquired signals and in reconstructed waveforms. ... click for CG635 Tech Support Double Rack Mount Drawing Single Rack Mount Drawing 3D Step File CG635 Volatility Statement SG380 RF Signal Generator FS725 Rb Frequency Standard FS740 GPS 10 MHz Reference PRS10 Rb Oscillator Double Rack Mnt. Dwg. Single Rack Mnt. Dwg. 3D Step File CG635 Volatility Statement SG380 RF Sig. Gen. FS725 Rb Freq. Std. FS740 10 MHz GPS Ref. PRS10 Rb Oscillator The CG635 generates extremely stable square wave clocks between 1 µHz and 2.05 GHz. The instrument's high frequency resolution, low jitter, fast transition times, and flexible output levels make it ideal for use in the development and testing of virtually any digital component, system or network. Clock and PRBS Signals X Clock and PRBS Signals at 622.08 MHz CG635 Clock Generator Clock and PRBS Signals Clock and PRBS Signals at 622.08 MHz Clean clocks are critical in systems that use high-speed ADCs or DACs. Spurious clock modulation and jitter create artifacts and noise in acquired signals and in reconstructed waveforms. Clean clocks are also important in communications systems and networks. Jitter, wander, or frequency offsets can lead to high bit error rates, or to a total loss of synchronization. The CG635 can provide the clean, stable clocks required for the most critical applications. The CG635 has several clock outputs. The front-panel Q and -Q outputs provide complementary square waves at standard logic levels (ECL, PECL, LVDS or +7 dBm). The square wave amplitude may also be set from 0.2 V to 1.0 V, with an offset between -2 V and +5 V. These outputs operate from DC to 2.05 GHz, have transition times of 80 ps, a source impedance of 50 Ω, and are intended to drive 50 Ω loads. Output levels double when these outputs are unterminated. The front-panel CMOS output provides square waves at standard logic levels. The output may also be set to any amplitude from 0.5 V to 6.0 V. The CMOS output has transition times of less than 1 ns and operates up to 250 MHz. It has a 50 Ω source impedance and is intended to drive high impedance loads at the end of any length of 50 Ω coax cable. Phase Noise X Phase Noise for 622.08 MHz and 10 MHz Outputs CG635 Clock Generator Phase Noise for 622.08 MHz and 10 MHz Outputs A rear-panel RJ-45 connector provides differential square wave clocks on twisted pairs at RS-485 levels (up to 105 MHz) and LVDS levels (up to 2.05 GHz). This output also provides ±5 VDC power for optional line receivers (CG640 to CG649). The clock outputs have 100 Ω source impedances and are intended to drive shielded CAT-6 cable with 100 Ω terminations. The differential clocks may be used directly by the target system, or with optional line receivers that provide complementary logic outputs on SMA connectors. The standard crystal timebase has a stability of better than 5 ppm. The CG635's 10 MHz timebase input allows the instrument to be phase-locked to an external 10 MHz reference. The 10 MHz output may be used to lock two CG635s together. There are two optional timebases. An oven-controlled crystal oscillator (OCXO) provides about 100 times better frequency stability than the standard crystal oscillator. A rubidium frequency source provides about 10,000 times better stability. Either optional timebase will substantially reduce the low-frequency phase noise of the synthesized output. Phase and Time Modulation The clock phase can be adjusted with high precision. The phase resolution is one degree for frequencies above 200 MHz, and increases by a factor of ten for each decade below 200 MHz, with a maximum resolution of one nano-degree . This allows clock edges to be positioned with a resolution of better than 14 ps at any frequency between 0.2 Hz and 2.05 GHz. RF Spectrum of a 100 MHz Clock X RF Spectrum of a 100 MHz Clock CG635 Clock Generator RF Spectrum of a 100 MHz Clock The timing of clock edges can be modulated over ±5 ns via a rear-panel time-modulation input . The input has a sensitivity of 1 ns/V and a bandwidth from DC to over 10 kHz, allowing an analog signal to control the phase of the clock output. This feature is very useful for characterizing a system's susceptibility to clock modulation and jitter. For Every Application
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